Euclyd’s €200M Series A Funds AI Chips Due in 2028

In its September 15, 2026 financing announcement, Eindhoven-based Euclyd said it had signed a Series A worth more than €200 million, co-led by Samsung, Somerset Capital Partners, the EQT-managed Scaleup Europe Fund and Innovation Industries. EIFO, imec.xpand, Brabant Development Agency and Quadri also participated, while former ASML president and chief executive Peter Wennink joined Euclyd as chairman.

The capital arrives well before the product it is meant to finance. TechRadar’s September 18 report says chief executive Bernardo Kastrup does not expect Euclyd’s commercial hardware to reach customers until 2028. Investors are therefore backing a development program and an architectural thesis, not hardware with established customer economics.

The financing covers a complete inference platform

Euclyd is targeting inference, the stage at which a trained AI model processes new requests. The company is not presenting a single accelerator as a simple replacement for an existing graphics processor; its roadmap spans programmable ASIC compute, processor-memory co-design and complete data-center systems.

SiliconANGLE’s account of the product roadmap identifies the planned chip as “craftwerk” and the system containing it as CWS, with an application-specific computing module and a new memory architecture. Euclyd also intends to sell hardware to data-center operators while licensing underlying technology to other chipmakers.

The round is intended to expand the engineering organization, advance silicon and systems development, build ecosystem partnerships and prepare for commercial deployment. That scope helps explain why the company sought substantial capital before shipping a product: designing the processor is only one part of delivering a usable inference system.

Investors are buying an inference-economics thesis

Euclyd argues that larger foundation models are placing growing pressure on power supplies, memory bandwidth, infrastructure complexity and capital budgets. Its proposed answer is to optimize compute, memory and the surrounding system together, aiming to reduce energy consumption, physical footprint and cost per token.

Those are company claims about a future platform, not verified outcomes from customer deployments. The disclosed material contains no production benchmarks, operating data or named commercial customers that would let buyers compare Euclyd’s promised economics with shipping alternatives under equivalent workloads.

The investment logic is nevertheless clear. Inference is a recurring operating workload, so any durable improvement in power consumption or hardware utilization could alter the cost of running models at scale. The wager is that coordinated design across compute, memory and systems can deliver gains that changing one component cannot—and that those gains will survive fabrication, integration and customer use.

Samsung and Wennink add industrial reach, not proof

Samsung’s participation is strategically relevant because Euclyd’s design depends partly on the relationship between processors and memory. The electronics group brings experience in memory manufacturing, systems engineering and semiconductor supply chains. The financing disclosure does not, however, establish that Samsung will fabricate Euclyd’s chips or provide a specified production process.

Wennink adds experience from the semiconductor-equipment industry and may help the company navigate manufacturing partners and production decisions. His appointment strengthens Euclyd’s governance and network, but it does not substitute for completed designs, fabricated silicon or customer validation.

This distinction is central to the round. The investors have supplied capital and industrial connections while the technically decisive milestones remain ahead. Euclyd must still turn its architecture into manufacturable hardware, build the software needed to use it and demonstrate that the complete system performs economically outside controlled development conditions.

The milestone ledger shows what has—and has not—been delivered

These milestones are interdependent. The architecture must become a verified design; the design must be fabricated and packaged; the software layer must make the hardware practical; and customers must then decide whether its performance and operating costs justify adoption. A delay or shortfall at any stage could change the economics of the complete platform.

The next disclosures will test the investment case

The most consequential evidence will be concrete progress toward working silicon: sampling schedules, manufacturing and packaging arrangements, measured performance and power consumption, supported models and workloads, software readiness and identified pilot customers. No single disclosure would prove the full commercial case, but together they would show whether Euclyd is moving from architectural claims toward deployable infrastructure.

For now, the confirmed story is a major financing, a heavyweight investor group, a new chairman and an ambitious inference-system roadmap. The stated delivery year leaves a long execution window in which Euclyd must convert capital into commercial hardware and show that its proposed efficiency gains persist in real customer workloads.